Masterfast
Found on:
Loader files:
"Engineer Humpty"
"Hooper"
"Hyper Blast"
"Mutant Monty"
"NATO Commander"
"Super Scoop"
"World Cup"
"Hooper"
"Hyper Blast"
"Mutant Monty"
"NATO Commander"
"Super Scoop"
"World Cup"
Loader files:
ROM Header 1
Contains only filename
ROM Data 1
Area loads to $02a7-0305 and forces an autostart to $02a7. Contains code to load turbo loader
ROM Header 2
Contains only filename
ROM Data 2
Contains the turbo loader
Encoding:Contains only filename
ROM Data 1
Area loads to $02a7-0305 and forces an autostart to $02a7. Contains code to load turbo loader
ROM Header 2
Contains only filename
ROM Data 2
Contains the turbo loader
Endianess:LSbF
Threshold:$01b0 (2400baud version), $0280 (2000baud version)
Lead-in:None
Sync:None
Structure:Threshold:$01b0 (2400baud version), $0280 (2000baud version)
Lead-in:None
Sync:None
Header:Standard Kernal Header
Checksum:None
Checksum:None
The loader copies Kernal ROM to RAM and then loads itself on top of it.
It uses kernal load routines with a patch to enable turbo loading.
The program will have a standard kernal header preceeding a data area, both using turbo load.
No duplication of header and data areas.
The Mastering software used came in two flavors, one 2000 baud version and one 2400 baud.
The loader was written by Angus Ager.
All titles in the 'found on' list uses the 2400 baud version, none using the 2000 version has been found so far.
Statistics:
It uses kernal load routines with a patch to enable turbo loading.
The program will have a standard kernal header preceeding a data area, both using turbo load.
No duplication of header and data areas.
The Mastering software used came in two flavors, one 2000 baud version and one 2400 baud.
The loader was written by Angus Ager.
All titles in the 'found on' list uses the 2400 baud version, none using the 2000 version has been found so far.
Statistics:
| 0 | 1 | |
| World Cup | 375 µs ($24) | 551 µs ($44) |
| Super Scoop | 371 µs ($24) | 553 µs ($44) |
| Hyper Blast | 360 µs ($22) | 531 µs ($41) |
| Mutant Monty | 360 µs ($22) | 528 µs ($41) |
| NATO Commander | 401 µs ($31) | 595 µs ($49) |
//
// 2400 baud Masterfast loader
// Original Kernal ROM is copied to RAM and this code loaded on top of it
//
.pc=$e394
.label bitCount = $a3
.label savedCINV_Lo = $a7
.label savedCINV_Hi = $a8
.label savedZP01 = $a9
.label loadedByte = $bd
.label SCROLY = $d011
.label CIAICR = $dc0d
.label TI2BLO = $dd06
.label TI2BHI = $dd07
.label CI2ICR = $dd0d
.label CI2CRB = $dd0f
.byte $03,$00,$03,$33,$03
// Autostart code jumps here
START:jsrsetup
sei
jmp$024e// =$e4ce. Code copied from $e4b0
// Copy new ILOAD code to $0230-$0258
setup:ldy#$28
copy:lda$e4b0,y
sta$0230,y
dey
bplcopy
lda#$30// Point ILOAD vector to $0230
sta$0330
lda#$02
sta$0331
lda#$83// IMAIN vector, default value
sta$0302
lda#$a4
sta$0303
rts
D_e3bb:.byte 0
// Unreferenced code
Ce3bc:sta$9000
rts
Ce3c0:ldy#$28
Ce3c2:lda$e4b0,y
sta$0230,y
dey
bplCe3c2
lda#$30
sta$0330
// End of unreferenced code
// Changed ILOAD Vector jumps here
//
// Changes copied kernal code with a new jmp instr to $e3ed
// $f875 is the routine which reads/writes blocks to tape
newILOAD:lda#$4c
sta$f875
lda#$ed
sta$f876
lda#$e3
sta$f877
lda#0
jsr$f4a5// LOAD, Original kernal, but a few instructions into it
jmpILOADExit
D_e3e7:.byte 0,0,0,$3f,$99,$43
// Kernal patch jumps here
patch:lda$0314
stasavedCINV_Lo
lda$0315
stasavedCINV_Hi
lda#$31// Set CINV IRQ vector to default $ea31
sta$0314
lda#$ea
sta$0315
jsrloadSetup
lda#$b0// Timer set to $01b0
staTI2BLO
lda#$01
staTI2BHI
waitFLAG:lda#$10
bitCIAICR// Check for FLAG IRQ
beqwaitFLAG
ldaCI2ICR// Service IRQs
lda#$19
staCI2CRB
nextByte:lda#$08
stabitCount
nextBit:lda#$10
waitFLAG2:bitCIAICR
beqwaitFLAG2
ldaCI2ICR
pha
lda#$19
staCI2CRB// Load latched value, one-shot mode, start
pla
lsr// Shift out bit indicating that Timer B has reached zero
lsr
rorloadedByte// Set loaded bit, ror = LSbF
decbitCount
bnenextBit
ldy#0
ldaloadedByte
sta($ac),y// Store loaded byte
jsr$fcdb// Original kernal routine. Advance read/write pointer
jsr$fcd1// Original kernal routine. Check the Tape Read/Write Pointer
bccnextByte
nop
cli
delay2:jsr$ffde// Original kernal routine. RDTIM, read software clock
cmp#$30
bnedelay2
sei
nop
lda#0
sta$02a0
jsr$fc93// Original kernal routine. Restore default IO
cli
clc
ldasavedCINV_Lo
sta$0314
ldasavedCINV_Hi
sta$0315
rts
initLoad:ldaSCROLY
and#$ef
staSCROLY
jsr$fb8e// Original Kernal code. Set load address
lda$01
and#$f7
sta$01
rts
// Unreferenced code
Ce47a:jsr$fe00// SETLFS
lda#$00
rts
// End of unreferenced code
loadSetup:jsrinitLoad
sei
lda$01
and#$1f
sta$01
sta$c0
cli
lda#0
tay
tax
jsr$ffdb// Original kernal code SETTIM. A,X,Y = 0 so resets software clock
delay:jsr$ffde// Original kernal code RDTIM. Reads software clock
cmp#$ff
bnedelay
sei
rts
// Everything from here on is copied to $0230
C0230:sei
lda$01
stasavedZP01
ora#$03
sta$01
lda$01
and#$fd
sta$01
nop
nop
nop
nop
cli
jmpnewILOAD
// New ILOAD code jumps here
ILOADExit:sei
ldasavedZP01
sta$01
cli
rts
// Unreferenced code ($24e-$257)
Ce4ce:lda$01
ora#$03
sta$01
cli
jmp$e37b// Warm start BASIC
// End of unreferenced code
// 2400 baud Masterfast loader
// Original Kernal ROM is copied to RAM and this code loaded on top of it
//
.pc=$e394
.label bitCount = $a3
.label savedCINV_Lo = $a7
.label savedCINV_Hi = $a8
.label savedZP01 = $a9
.label loadedByte = $bd
.label SCROLY = $d011
.label CIAICR = $dc0d
.label TI2BLO = $dd06
.label TI2BHI = $dd07
.label CI2ICR = $dd0d
.label CI2CRB = $dd0f
.byte $03,$00,$03,$33,$03
// Autostart code jumps here
START:jsrsetup
sei
jmp$024e// =$e4ce. Code copied from $e4b0
// Copy new ILOAD code to $0230-$0258
setup:ldy#$28
copy:lda$e4b0,y
sta$0230,y
dey
bplcopy
lda#$30// Point ILOAD vector to $0230
sta$0330
lda#$02
sta$0331
lda#$83// IMAIN vector, default value
sta$0302
lda#$a4
sta$0303
rts
D_e3bb:.byte 0
// Unreferenced code
Ce3bc:sta$9000
rts
Ce3c0:ldy#$28
Ce3c2:lda$e4b0,y
sta$0230,y
dey
bplCe3c2
lda#$30
sta$0330
// End of unreferenced code
// Changed ILOAD Vector jumps here
//
// Changes copied kernal code with a new jmp instr to $e3ed
// $f875 is the routine which reads/writes blocks to tape
newILOAD:lda#$4c
sta$f875
lda#$ed
sta$f876
lda#$e3
sta$f877
lda#0
jsr$f4a5// LOAD, Original kernal, but a few instructions into it
jmpILOADExit
D_e3e7:.byte 0,0,0,$3f,$99,$43
// Kernal patch jumps here
patch:lda$0314
stasavedCINV_Lo
lda$0315
stasavedCINV_Hi
lda#$31// Set CINV IRQ vector to default $ea31
sta$0314
lda#$ea
sta$0315
jsrloadSetup
lda#$b0// Timer set to $01b0
staTI2BLO
lda#$01
staTI2BHI
waitFLAG:lda#$10
bitCIAICR// Check for FLAG IRQ
beqwaitFLAG
ldaCI2ICR// Service IRQs
lda#$19
staCI2CRB
nextByte:lda#$08
stabitCount
nextBit:lda#$10
waitFLAG2:bitCIAICR
beqwaitFLAG2
ldaCI2ICR
pha
lda#$19
staCI2CRB// Load latched value, one-shot mode, start
pla
lsr// Shift out bit indicating that Timer B has reached zero
lsr
rorloadedByte// Set loaded bit, ror = LSbF
decbitCount
bnenextBit
ldy#0
ldaloadedByte
sta($ac),y// Store loaded byte
jsr$fcdb// Original kernal routine. Advance read/write pointer
jsr$fcd1// Original kernal routine. Check the Tape Read/Write Pointer
bccnextByte
nop
cli
delay2:jsr$ffde// Original kernal routine. RDTIM, read software clock
cmp#$30
bnedelay2
sei
nop
lda#0
sta$02a0
jsr$fc93// Original kernal routine. Restore default IO
cli
clc
ldasavedCINV_Lo
sta$0314
ldasavedCINV_Hi
sta$0315
rts
initLoad:ldaSCROLY
and#$ef
staSCROLY
jsr$fb8e// Original Kernal code. Set load address
lda$01
and#$f7
sta$01
rts
// Unreferenced code
Ce47a:jsr$fe00// SETLFS
lda#$00
rts
// End of unreferenced code
loadSetup:jsrinitLoad
sei
lda$01
and#$1f
sta$01
sta$c0
cli
lda#0
tay
tax
jsr$ffdb// Original kernal code SETTIM. A,X,Y = 0 so resets software clock
delay:jsr$ffde// Original kernal code RDTIM. Reads software clock
cmp#$ff
bnedelay
sei
rts
// Everything from here on is copied to $0230
C0230:sei
lda$01
stasavedZP01
ora#$03
sta$01
lda$01
and#$fd
sta$01
nop
nop
nop
nop
cli
jmpnewILOAD
// New ILOAD code jumps here
ILOADExit:sei
ldasavedZP01
sta$01
cli
rts
// Unreferenced code ($24e-$257)
Ce4ce:lda$01
ora#$03
sta$01
cli
jmp$e37b// Warm start BASIC
// End of unreferenced code